ZHCSQT2 March 2024 ADS127L18
ADVANCE INFORMATION
The data size consists of an optional STATUS_DP header byte, the conversion data, and an optional CRC byte. As shown in Figure 7-35, the data packet ranges from two bytes (16-bit data) to five bytes (header byte + 24-bit data + CRC byte). The status and CRC bytes are enabled by bits 7 and 6 of the DP_CFG1 register.
Conversion data are coded in two's-complement format, MSB sign bit first, in 16- or 24-bit format. Conversion data are programmed by the DATA bit of the GEN_CFG3 register. Table 7-14 lists the scaling of the code values. Conversion data clip at positive and negative full-scale values when the input signal exceeds the positive and negative full-scale range.
INPUT VOLTAGE, VIN (V)(1) | 24-BIT OUTPUT DATA(2) | |
---|---|---|
STANDARD RANGE | EXTENDED RANGE | |
1.25 · k · VREF · (223 – 1) / 223 | 7FFFFFh | 7FFFFFh |
k · VREF · (223 – 1) / 223 | 666666h | |
k · VREF / 223 | 000001h | 000001h |
0 | 000000h | 000000h |
–k · VREF / 223 | FFFFFFh | FFFFFFh |
–k · VREF | 800000h | 99999Ah |
–1.25 · k · VREF | 800000h |