ZHCSK67B June 2017 – August 2019 ADS1287
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
OFC[7:0] | |||||||
R/W-00h |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
OFC[15:8] | |||||||
R/W-00h |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
OFC[23:16] | |||||||
R/W-00h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7:0 | OFC[23:0] | R/W | 000000h |
Offset calibration registers. These three registers are the 24-bit offset calibration word. The offset calibration is in two's complement format. The ADC subtracts the offset value from the conversion result prior to the full-scale operation. |