ZHCSIK6C November 2017 – November 2019 ADS8166 , ADS8167 , ADS8168
PRODUCTION DATA.
As described in Table 6, the host controller can use any of the four SPI protocols (SPI-00, SPI-01, SPI-10, or SPI-11) to write data into the device.
PROTOCOL | SCLK POLARITY
(At the CS Falling Edge) |
SCLK PHASE
(Capture Edge) |
SDI_MODE[1:0] BITS(1) | SDO_MODE[1:0] BITS(2) | DIAGRAM |
---|---|---|---|---|---|
SPI-00 | Low | Rising | 00h | 00h | Figure 51 |
SPI-01 | Low | Falling | 01h | 00h | Figure 51 |
SPI-10 | High | Falling | 02h | 00h | Figure 52 |
SPI-11 | High | Rising | 03h | 00h | Figure 52 |
On power-up or after coming out of any asynchronous reset, the device supports the SPI-00-S protocol for data read and data write operations. To select a different SPI-compatible protocol, program the SDI_MODE[1:0] bits in the SDI_CNTL register. This first write operation must adhere to the SPI-00-S protocol. Any subsequent data transfer frames must adhere to the newly-selected protocol. The SPI protocol selected by the SDI_MODE[1:0] configuration is applicable to both read and write operations.
Figure 51 and Figure 52 detail the four protocols using an optimal data frame.
NOTE
As explained in the Register Read/Write Operation section, a valid register read or write operation to the device requires 24 SCLKs to be provided within a data transfer frame. When reading ADC conversion data, a minimum 16 SCLKs are required within a data transfer frame.