7.6.5.3 LO_TRIG_AINx[15:0] Register (address = 71h to 54h) [reset = 0000h]
This bank of registers configures the low threshold for the digital window comparator. For 16-bit ADC data output, the comparator thresholds are 16-bits wide and are spread over two 8-bit registers. Use the registers listed in Table 50 to configure the low threshold for the individual analog input channels
Table 50. LO_TRIG_AINx[15:0] Register Address Map(1)
ANALOG INPUT |
REGISTER ADDRESS FOR LO_TRIG_AINx[15:8] |
REGISTER ADDRESS FOR LO_TRIG_AINx[7:0] |
AIN7 |
051h |
054h |
AIN6 |
059h |
058h |
AIN5 |
05Dh |
05Ch |
AIN4 |
061h |
060h |
AIN3 |
065h |
064h |
AIN2 |
069h |
068h |
AIN1 |
06Dh |
06Ch |
AIN0 |
071h |
070h |
(1) AINx refers to analog inputs channels AIN0, AIN1, AIN2, AIN3, AIN4, AIN5, AIN6, and AIN7.
Figure 89. MSB Byte Register for LO_TRIG_AINx[15:8]
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
LO_TRIG[15:8] |
R/W-0000 0000b |
Figure 90. LSB Byte Register for LO_TRIG_AINx[7:0]
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
LO_TRIG[7:0] |
R/W-0000 0000b |
Table 51. LO_TRIG_AINx[15:0] Registers Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
15:0 |
LO_TRIG[15:0] |
R/W |
0000 0000 0000 0000b |
Low threshold for the digital window comparator |