4 Pin Configuration and Functions

SN74LV4051A-Q1 D or PW Package, 16-Pin SOIC
or TSSOP (Top View)

Figure 4-1 D or PW Package, 16-Pin SOIC or TSSOP (Top View)

Table 4-1 Pin Functions

PIN		TYPE⁽¹⁾	DESCRIPTION
NAME	NO.	TYPE⁽¹⁾	DESCRIPTION
Y4	1	I⁽²⁾	Input to mux
Y6	2	I⁽²⁾	Input to mux
COM	3	O⁽²⁾	Output of mux
Y7	4	I⁽²⁾	Input to mux
Y5	5	I⁽²⁾	Input to mux
INH	6	I⁽²⁾	Enables the outputs of the device. Logic low level with turn the outputs on, high level will turn them off.
GND	7	—	Ground
GND	8	—	Ground
C	9	I	Selector line for outputs (see Section 7.4 for specific information)
B	10	I	Selector line for outputs (see Section 7.4 for specific information)
A	11	I	Selector line for outputs (see Section 7.4 for specific information)
Y3	12	I⁽²⁾	Input to mux
Y0	13	I⁽²⁾	Input to mux
Y1	14	I⁽²⁾	Input to mux
Y2	15	I⁽²⁾	Input to mux
Vcc	16	I	Device power input

(1) I = input, O = output

(2) These I/O descriptions represent the device when used as a multiplexer, when this device is operated as a demultiplexer pins Y0-Y7 may be considered outputs (O) and the COM pin may be considered inputs (I).