SCEA116
June 2022
LSF0102
,
LSF0102-Q1
,
TXS0102
,
TXS0102-Q1
1
Design Considerations
Recommended Parts
Design Considerations
Typical data rates can range from 100 kpbs – 3.4 Mbps
Certain I
2
C modes have minimum rise time requirements that may be violated due to the edge-rate acceleration feature in the TXS family
Enable communication when devices have mismatched logic voltage levels.
Prevent damage to devices that cannot support higher voltage inputs.
Improve data rates over discrete translation solutions.
[FAQ] Why are the TXS01xx VIH/VIL specifications so stringent?
Need additional assistance? Ask our engineers a question on the
TI E2E™ Logic Support Forum
.
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