SLUAAJ7
June 2022
UCC256402
,
UCC256403
,
UCC256404
Abstract
Trademarks
1
UCC25640x Selection Guide
2
UCC25640x Features Brief Overview
2.1
High Voltage(HV) Startup
2.1.1
HV Startup Procedure
2.1.2
HV Startup with External Bias
2.1.3
HV Start-up, VCC, X-cap Discharge Internal Block Diagram
2.1.4
HV Startup External Resistor
2.2
XCAP Discharge
2.2.1
IEC Standards
2.2.2
Detecting AC presence
2.2.3
Test Current Injection for Zero Crossing Detection
2.2.4
Typical Waveforms of HV Startup and XCAP Discharge
2.3
Feedback Chain
2.3.1
FBreplica Generation
2.3.2
Vcomp Signal and Threshold Voltages
2.3.3
FB Pin Voltage Typical Waveform at no Load
2.4
Hybrid Hysteretic Control and VCR Pin Voltage and Gate Pulse Generation
2.4.1
Hybrid Hysteretic Control
2.4.2
VCR Pin Voltage
2.4.3
VCR Typical Waveform
2.5
Soft Start
2.5.1
Soft Start Timing
2.5.2
Soft Start Initial Voltage Programming
2.6
Burst Mode
2.6.1
Burst Patterns
2.6.2
BMTL/BMTH Ratio Programming
2.6.3
BMTH Generation
2.6.4
Interpreting BMTL and BMTH
2.6.5
Soft On or Off
2.6.6
Operation when Burst Mode Disabled
2.6.7
Typical Waveforms
2.7
Adaptive Dead Time Control
2.8
Fault Management
2.8.1
OCP Protection
2.8.2
OCP Fault Typical Waveforms
2.8.3
Over Voltage Protection using Bias Winding (BW OVP)
2.8.4
Restart or Latch
2.9
ZCS Region Prevention Scheme
2.9.1
ZCS Effects
2.9.2
ZCS Detection and Prevention and Disabling
3
UCC25640x Power Up Guidelines and Debugging Notes
3.1
Power Up Procedure
3.2
HV Pin
3.3
VCC Pin
3.4
BLK Pin
3.5
FB Pin
3.6
ISNS Pin
3.7
VCR Pin
3.8
BW Pin
3.9
LL/SS Pin
3.10
LO Pin
3.11
RVCC Pin
3.12
HS, HO, HB Pins
4
References
2
UCC25640x Features Brief Overview
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